Very-Large-Scale Integration(VLSI)

Categories: APSCHE Courses
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About Course

This course covers the design, implementation, and optimization of integrated circuits using VLSI technology. Students will learn about transistor-level design, logic gates, digital circuits, and semiconductor fabrication processes, preparing them for careers in microelectronics and digital system design.

What Will You Learn?

  • Design digital circuits using VLSI technology at the transistor and logic gate level.
  • Understand the semiconductor fabrication process and how integrated circuits are made.
  • Implement CMOS (Complementary Metal-Oxide-Semiconductor) design techniques in VLSI systems.
  • Use industry-standard VLSI design tools for simulation, synthesis, and optimization.
  • Analyze power, timing, and area trade-offs in VLSI circuit design for performance and efficiency.

Course Content

Static Timing Analysis for VLSI Engineers

  • Introduction to Timing Analysis
  • Basic Terminologies used in STA
  • Basics of Timing Analysis – Part I
  • Basics of Timing Analysis – Part II
  • Clocks and their Characteristics
  • Timing Exceptions and Back Annotation
  • PVT Variations and their Effect on Timing
  • Understanding Timing Reports – Part 1
  • Understanding Timing Reports – Part 2
  • Introduction to Effect of Clock Skew on Timing and Fixing Timing Violations
  • Advanced Concepts in STA – Part I
  • Advanced Concepts in STA – Part II

Verification using Verilog

RTL Design using Verilog HDL

Logic Design for VLSI Engineers

ASIC Design Flow

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